bit parallel

英 [bɪt ˈpærəlel]

美 [bɪt ˈpærəlel]

网络  位并行

计算机

双语例句

• The compression ratio of algorithm is more than 1.9. The compression algorithm based on bit plane transform can be realized by parallel computing model.
  压缩比达到了1.9以上，与其它超光谱图像压缩算法相当。位平面变换算法具有很好的并行性。
• Design of 16 Bit Parallel Data Communication Interface
  双机16位并行通讯电路设计
• 20 Bit Σ△ ADC Connecting With Parallel Port Of PC
  利用PC的并行端口实现与20比特∑△型ADC的连接
• The paper elaborated on the register configuration of the digital control circuit module, and send data to the control logic state machine, the NRZI module, bit stuffing module, parallel to serial module implementation of principles and methods.
  论文详细阐述了数字控制电路中的寄存器配置模块、数据发送控制逻辑状态机、反转不归零编码模块、比特填充器模块、并行转串行模块的实现原理和方法。
• Monolithic Integrated 16 × 16 bit Multiplier Operating in Parallel and Pipeline
  单片集成并行流水线操作16×16位数字乘法器
• For example, a device that converts between bit serial and bit parallel and resolves differences in transmission speeds.
  例如，一台在串行位和并行位之间作转换且解决传输速度差别的设备。
• Design of Bit Parallel RS Encoder Based on Weak Dual Basis
  弱对偶基下比特并行RS编码器的设计
• Based on these, an algorithm to optimize MDS codes is introduced by analyzing the complexity of bit parallel multipliers.
  在此基础上，借助于对比特级并行乘法器的复杂度的分析，给出了一个优化最大距离可分码的算法。
• An efficient design method for a 24 × 24 bit+ 48 bit parallel saturating multiply-accumulate ( MAC) unit is described.
  阐述了一种24×24bit+48bit带饱和处理的乘加单元的优化设计。
• The replacement type ADC, formed by m grades × n bits ADC, it needs just one set of n bit full parallel type ADC and converts the analog voltage signal into the digital signal.
  置换式ADC，以组成m级×n位ADC为例，仅需一套n位的全并行式ADC，直接将模拟电压信号转换成数字信号；